Evaluate and deploy the evolving verification methodologies to handle increasingly complex SoC/IP designs within aggressive, market-driven schedules.
Ensure quality adherence during all stages of the project life cycle. Also carry out a thorough analysis of existing processes and recommend and implement the process improvements to ensure Zero Defect chips
Ability to think differently, encouraging and influencing technological innovations in the team
Ability to work well as part of a team both locally, and also with remote or multi-site teams
Driven and competitive when dealing with the outside, collaborative when dealing with the inside
Experience in automotive protocols like LIN, CAN, Flex, Graphics/Multimedia/Networking protocols like PCIe, MIPI, H.264, Ethernet, USB, ITU T.656 would be an advantage
Exposure to formal verification methodology, assertions/SVA, functional coverage, gate level simulations, verification planner and regression management
Experience in Low power verification using CPF/UPF
Exposure to pre silicon validation/emulation (Palladium, Zebu) would be a big advantage.