Technology 7nm / 14nm / 16nm / 28nm Tools
Design Compiler / Genus / PrimeTime / Tempus Job Description
Exposure to Synthesis , static timing analysis (STA) and timing sign - off
experience with Low power design techniques and checks o Logical equivalence checks (in Formailty or LEC)
Works in technical engagements for the development and implementation of complex products / applications / solutions in the field of Synthesis and timing signoff in ASIC designs.
Uses in - depth Timing expertize to provide technical expertise to the customer.
Works with sales staff in assessing potential application of company products to meet customer needs and preparing detailed product specifications for the development and implementation of customer applications / solutions.
Hands on experience in synthesis (physical synthesis ) and STA (pre & post layout timing analysis) using industry standard tools , ASIC design , advance nodes libraries and overall flow knowledge is mandatory.