Static Timing Analyst / Synthesis Engineer

Macropace Technologies
  • Noida
  • 2-9 lakh
  • 2-7 years
  • Views
  • 25 Jul 2017

  • IT/ Information Technology

  • Management Consulting
Job Description


Responsibilities: Synthesizing the multi- power domain blocks/ IPs with challenging power, area and timing constraints Formal Equivalence Checking Constraint development, timing closure and STA Support to physical design team in fine- tuning the floorplan & constraints for implementation. UPF/ CPF based flow. Desired Skills: Must posses 3- 8 years of experience working in low power design synthesis, preferably using UPF.


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Macropace Technologies