Software Developer

V3 Staffing Solutions
  • Hyderabad
  • Confidential
  • 4-6 years
  • Views
  • 16 Nov 2018

  • Software Design & Development

  • Consumer Durables/ Semi Durables
Job Description

Minimum Experience - 4 Years

Location : Hyderabad
Skills - UVM,System Verilog
Notice period : Immediate to max 15 Days

Implementation of a major verification task in a ProjectUVM & System Verilog
Test Plan Development
Coverage Implementation and Analysis
Automation Skills
Test Scenario creation
Skill Name
Good Exposure to Interface standards
Good Debug Skills

Verification Plan for the projects
Test scenario and Coverage implementation
Time bound execution with desired quality
Automation of the regressions, coverage analysis and daily tracking
Mentor juniors on implementation related tasks.


Competencies/Skill sets for this job

UVM Verification System Verilog

Job Posted By

Venkatesh
Core Recruiter

About Organisation

V3 Staffing Solutions