RTL Design Engineer

Mobiveil Technologies India Private Limited
  • Bangalore, Chennai
  • 10-11 lakh
  • 3-6 years
  • Views
  • 13 Jul 2016

  • IT/ Information Technology

  • IT/ Technology - VLSI/ ASIC/ EDA/ Semiconductor
Job Description

Requirements:
PCS development in PCIe Protocol.
PHY Design in DDRX/ LPDDRX
Experience creating Verilog based designs from Scratch
Experience developing AXI based IPs/ Blocks
Good Lint/CDC/Synthesis check experience.
Experience: 3 to 6 years
Educational Qualification – BE/BTech or ME/MTech


Competencies/Skill sets for this job

Ddrx IPs LPDDRX

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