Qualcomm's Physical Design Signoff Engineering Team is responsible for SOC level signoff of phases of the complete physical design flow for MSM/MDM/CSMs at the core and chip-level. We are actively seeking candidates for multiple Physical Design Signoff positions in Chennai, India
Responsibilities: You will be part of a team responsible for the complete SOC Physical Design Signoff Flow for MSM/MDM/CSM chips.
Tasks involved can be one or more of the following:
Own complete PV convergence, Closure and Signoff for the full chip.
SOC level Physical Verification Signoff and Closure for 28nm, 14nm, 10nm and 7nm designs.
Scripting and methodology development for early convergence and signoff of SOC level designs.