FPGA Verification Engineer

Macropace Technologies
  • Kuala Lumpur
  • 10-13 lakh
  • 6-11 years
  • Views
  • 17 May 2017

  • IT/ Information Technology

  • Electrical/ Electronics
Job Description

Hands on Experience in FPGA and RTL Verification.
The engineer must have the capability to do RTL debug with any waveform viewing tools and modify the RTL accordingly to fit into the emulation/fpga model.
Knowledge with System Verilog/VHDL, backend synthesis, place and route, timing analysis, C/C++, Python is needed.
Experience in Mentor Graphics Veloce emulation platforms and Synopsys HAPS FPGA platform is an added advantage.

Competencies/Skill sets for this job

Verilog Timing Analysis Fpga Verification Waveform C/c++ Graphics

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About Organisation

Macropace Technologies