DFT Engineer

Mindlance India Pvt. Ltd.
  • Bangalore
  • Confidential
  • 2-8 years
  • Views
  • 28 Jun 2017

  • Design

  • Electrical/ Electronics, Engineering, IT/ Technology - VLSI/ ASIC/ EDA/ Semiconductor
Job Description

Job Overview:
Need knowledge of design for test (DFT) structures such as scan chains, scan compression and verification concepts for test coverage (ATPG). Be able to generate ATPG and analyze coverage results and how to extend or optimize them. Need to know how to run gate simulation for to verify scan patterns to demonstrate functionality.

Minimum Qualification:
2 years’ experience in DFT in ASICs

Preferred Qualification:
experience in DFT for large scale ASICs. Experience with Mentor Graphics DFT tools.


Competencies/Skill sets for this job

Dft Compression Atpg

Job Posted By

Prashant Gautam
Talent Acquisition Manager

About Organisation

Mindlance India Pvt. Ltd.