Analog Layout Engineer

Macropace Technologies
  • Malaysia-Other
  • Confidential
  • 4-9 years
  • Views
  • 18 Aug 2017

  • Production/ Manufacturing/ Engineering

  • IT/ Technology - VLSI/ ASIC/ EDA/ Semiconductor
Job Description

Analog layout with Intel 10nm/14nm/16nm/22nm and Cadence Virtuoso experience
Analog/Digital/IO layout experience.

Experience in analog/IO layout in technology nodes 22nm and lower
Experience on handling ESD, EM-IR fixes
Floorplan and placement expertise for analog and IO designs
Experience in handling IP level integration is a plus

Competencies/Skill sets for this job

Analog Layout Integration Cadence Virtuoso Io Layout

Job Posted By

About Organisation

Macropace Technologies