DMA HSI team introduction
Our team (High Speed Interface) develops IP for data transmission on wired networks. In particular, we design (from specification to validation) macros capable to transmit and to receive data signals up to 56Gbps (current project) to be embedded in many SoC. DMA division, in tight contact with customers, develops ASICs that include our macros to manage several data transfers in networking applications.
To propose and define analog layout solutions: floor-planning, area and effort estimation, suggestion to guidelines for the physical layout.
To layout the analog macro blocks (including RF, high speed and low power circuits), using ultra scaled CMOS technology (now TSMC FinFET 16nm and 7nm).
To optimize the layout performance in term of parasitic reduction, analog layout quality, taking care of all DRM rules.
To close the top of the analog macros, with signal routing, supplies distribution, top finishing, tiling, gds delivery.
To contribute to new tools evaluation and to feedback on effectiveness of new features.
Experience on analog layout. In particular, skilled to do layout of analog building blocks, to estimate area and time, to close macro top with layout finishing.
Experience on RF and CMOS analog layout. In particular, to be used to quality layout in term of matching, symmetry, resistive and capacitive parasitic minimization; to be used to challenging layout in term of complexity and speed (>5GHz).
Experience in TSMC FinFET technology.
Autonomy and remote working skills. To be able to work in remote without losing efficiency due to the distance to the other analog design and layout teams.
Adaptability, flexibility, high sense of the responsibility and of the duty.
Experience on 16FFC and N7 technology by TSMC
Experience on high data rate data transmit circuits
Italian or French language