ASIC Verification Engineer - Uvm/vvm/ovm

Talpro
  • Bangalore
  • 11-20 lakh
  • 3-12 years
  • Views
  • 16 Jan 2017

  • IT/ Information Technology

  • IT/ Technology - Software/ Services
Job Description

Requirements include:
Expertise in System verilog with either of the methodologies: UVM/VVM/OVM.
- Strong digital design fundamentals
- Computer architecture - processors, memory systems, DMA and peripherals
- Familiarity with hardware verification languages like Specman/SystemVerilog
- C and Assembly programming
- Perl/Tcl Scripting
- Good communication and presentation skills and team work.
- Knowledge of ARM-Cortex architecture, AHB/AXI protocols etc


Competencies/Skill sets for this job

Scripting Perl System Verilog Asic Verfication

Job Posted By

About Organisation

Talpro